Lesson 4.7.3.3

4.7.3.3 Instruction set and addressing modes Quiz: AQA Computer Science, Unit 7

20 questions

Written by Revision Ninja · Last reviewed 11 October 2026

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Lesson 4.7.3.3, Instruction set and addressing modes: 20 multiple choice questions for the AQA Computer Science (7517), Unit 7: Fundamentals of computer organisation and architecture, written with Revision Ninja.

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The 20 questions

  1. What is the complete collection of machine code commands a specific processor can execute?

    • Operating system
    • Register transfer
    • Instruction set
    • Assembly language

  2. Why is binary machine code generally non-portable between different processor architectures?

    • Bus widths change
    • Clock speeds differ
    • Opcodes are architecture-specific
    • RAM speeds vary

  3. Which two components make up a standard machine code instruction?

    • Opcode and operand
    • Byte and bit
    • Register and bus
    • ALU and accumulator

  4. In the simple model with a 4-bit opcode (3 bits for the basic operation and 1 bit for the addressing mode), how many distinct basic operations can be encoded?

    • 16 (2^4)
    • 2 (2^1)
    • 4 (2^2)
    • 8 (2^3)

  5. How many unique instructions can be represented by a 4-bit opcode?

    • 8
    • 32
    • 16
    • 4

  6. An 8-bit instruction has a 4-bit opcode and a 4-bit operand. How many distinct operand values can the operand field hold?

    • 4 (2^2)
    • 8 (2^3)
    • 16 (2^4)
    • 256 (2^8)

  7. What does the operand represent when using immediate addressing?

    • A memory address
    • A pointer address
    • The actual data
    • A register address

  8. What does the operand represent when using direct addressing?

    • An indirect pointer
    • The actual data
    • A memory address
    • An opcode bit

  9. In assembly code, what value is loaded by the immediate instruction LOAD #20?

    • 20 bytes
    • Address 20 itself
    • 20
    • Data at location 20

  10. What value is loaded into the register by the direct addressing instruction LOAD 20?

    • Address 20 contents
    • Address of register
    • The value 20
    • The address 20

  11. A design uses direct addressing with a 4-bit operand. How many distinct memory addresses can the operand name?

    • 256
    • 16
    • 4
    • 8

  12. Which addressing mode is best when operating on a hardcoded constant value?

    • Immediate addressing
    • Indexed addressing
    • Direct addressing
    • Indirect addressing

  13. In simple instruction sets, what do the combined opcode bits specify?

    • Address and data
    • Operation and mode
    • Register and memory
    • Clock and frequency

  14. Which software component or structure is specific to a particular processor family?

    • Operating system
    • Instruction set
    • High-level code
    • Compiler

  15. A design uses 6-bit opcodes and 10-bit operands. What is the instruction length, and how many opcodes are possible?

    • 12 bits, and 64 opcodes
    • 18 bits, and 32 opcodes
    • 16 bits, and 64 opcodes
    • 16 bits, and 32 opcodes

  16. What is the maximum number of unique memory addresses an 8-bit direct operand can access?

    • 512
    • 1024
    • 128
    • 256

  17. Which addressing mode is used for the numerical value 5 in the instruction ADD R1, #5?

    • Register addressing
    • Direct addressing
    • Immediate addressing
    • Indirect addressing

  18. What must high-level code be translated into for processors with different instruction sets?

    • Universal bytecode
    • Different machine code
    • Identical machine code
    • Same assembly code

  19. An opcode uses 3 bits for operations and 1 bit for addressing mode. How many operations are possible?

    • 8
    • 3
    • 16
    • 4

  20. In the AQA simplified instruction model, which part of the instruction contains the addressing mode bit?

    • Opcode
    • Register
    • Status register
    • Operand

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