Lesson 4.7.3.2
4.7.3.2 The fetch-execute cycle and registers Quiz: AQA Computer Science, Unit 7
20 questions
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Lesson 4.7.3.2, The fetch-execute cycle and registers: 20 multiple choice questions for the AQA Computer Science (7517), Unit 7: Fundamentals of computer organisation and architecture, written with Revision Ninja.
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The 20 questions
-
What are the three sequential stages of the processor cycle?
- Read, write, clear
- Input, process, output
- Load, store, branch
- Fetch, decode, execute
-
Which register is loaded with the memory address of the next instruction to be fetched?
- Memory address register
- Memory buffer register
- Current instruction register
- Status register
-
Which register temporarily holds data read from or written to memory?
- Memory Data Register
- Current Instruction Register
- Program Counter
- Memory Address Register
-
Which processor component decodes the opcode stored in the Current Instruction Register?
- Status register
- Arithmetic logic unit
- Clock
- Control unit
-
Which component carries out arithmetic calculations during the execute stage?
- CIR
- ALU
- MAR
- PC
-
A processor takes 3 clock cycles to fetch, 1 to decode and 2 to execute an instruction. How many cycles does each instruction take?
- 6
- 5
- 3
- 9
-
A program has 1,000 instructions, each taking 6 clock cycles, on a 2 MHz clock. How long does the program take to run?
- 0.3 ms
- 30 ms
- 3 s
- 3 ms
-
Which register holds the instruction while it is being decoded by the control unit?
- MAR
- PC
- Status register
- CIR
-
What is the primary role of the memory buffer register during a fetch stage?
- Stores jump addresses
- Holds fetched data
- Calculates arithmetic
- Decodes opcodes
-
What condition causes the continuous fetch-execute cycle to stop operating?
- Halt instruction
- Register overflow
- Branch taken
- Clock tick
-
Which specialised register automatically increments during every fetch stage?
- Status Register
- Program Counter
- Accumulator
- Memory Address Register
-
The PC contains 1500 and the instruction is 2 bytes long with byte addressing. After the fetch, and before executing a non-branch instruction, what does the PC contain?
- 1501
- 1500
- 1600
- 1502
-
How does execution proceed when a conditional branch instruction condition evaluates to false?
- Restarts completely
- Sequentially
- Halts immediately
- Branches backwards
-
Which component checks the zero flag condition during a conditional branch?
- Control unit
- Arithmetic logic unit
- Memory buffer register
- System clock
-
What main action occurs during the fetch stage of the fetch-execute cycle?
- Retrieving an instruction
- Decoding an opcode
- Executing an operation
- Writing to RAM
-
Which internal CPU bus transfers the contents of the PC to main memory?
- Address bus
- Data bus
- Control bus
- Internal bus
-
Which of these is NOT one of the three stages of the fetch-execute cycle?
- Decode
- Fetch
- Execute
- Store
-
Why is an instruction copied from the MBR to the CIR during fetch?
- Updates status flags
- Increments the PC
- Frees the MBR
- Clears the MAR
-
Where is the result of an arithmetic operation usually written during the execute phase?
- To the CIR
- To the MAR
- To main memory
- To a register
-
A processor runs at 4 GHz, and each instruction takes an average of 8 clock cycles. How many instructions does it execute per second?
- 3.2 x 10^10
- 4 x 10^9
- 5 x 10^8
- 5 x 10^6
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